The present invention relates to a semiconductor device and a manufacturing method thereof.
To improve the reliability of semiconductor apparatuses, various semiconductor device structures have been proposed in recent years.
Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2008-530821 discloses a dielectric material serving as an interlayer insulating film of a semiconductor device as described below. The dielectric material contains Si, C, O, and H atoms and has a three-dimensional network structure. The peak area regarding the expansion or contraction of CH2 or CH3, the expansion or contraction of SiH, and a SiCH3 bond obtained by Fourier transform infrared spectroscopy (FTIR) falls within a predetermined range standardized by the thickness of the dielectric film. The porosity of the dielectric material exceeds 20%. For this reason, it is believed that a low-permittivity dielectric film exhibiting good electronic and mechanical properties can be provided.
Japanese Unexamined Patent Publication No. 2006-237278 discloses a semiconductor device including a bump electrode as described below. The semiconductor device includes a pad electrode, an under-bump metal film, and an Au bump electrode. The under-bump metal film includes a TiW film and an Au film. The thicknesses of the TiW and Au films of the under-bump metal film meet a predetermined formula. For this reason, it is believed that occurrence of cracks in the under-bump metal film in a flip chip bonding step can be controlled.